As the number of integrated circuits in electronic systems increases, and the size of the individual devices decreases, the density of interconnections, as well as the number of input/outputs (I/Os), are progressively increased year after year. Accordingly, semiconductor chip package technology are also improved in areas such as capacity, quality and cost. For a package with high-density interconnects and I/Os, cross-talk related signal integrity is a concern. To illustrates this problem, please refer to FIGS. 1, 2A, and 2B.
FIG. 1 illustrates a cross-sectional view of a conventional thin-film chip package. The package comprises a semiconductor chip 10 having a plurality of pads 20 and Controlled Collapse Chip Connection (C4) balls 30. The chip 10 is flipped such that the C4 balls 30 are bounded to a carrier 40. The carrier 40 can contain a plurality of conductors to be used for power, ground, and signal interconnection. Each conductor has three sections: a vertical via 51, a trace 60, and a vertical trace 70. The vertical trace 70 can be connected to a module ball 80. Module balls 80 are provided to form contacts between the carrier 40 and a substrate 90. For a multi-layer thin film package carrier 40, depending on the number of layers used in the carrier 40, the height of the via 51 can range from 0.5 to 2.5 mm. The C4 process and technology for high-density packages are well known in the art and will not be described further here.
When the chip 10 uses receivers and transmitters having differential signal pairs, parallel pairs of conductors are used to carry signals. Preferably, any noise that affects the pair of conductors affects one in the same manner as the other. Since the signals carried by the pair of conductors are inversions of each other, the net effect of noise on the carried signal is minimized, realizing a good signal to noise ratio.
For example, assume that the chip 10 comprises a pair of receiver (RX) pads 21 adjacent to a pair of transmission (TX) pads 22. The carrier 40, at the interface with the chip 10, includes a pair of receiver (RX) vias 51 coupled to the RX pads 21 to receive signals from outside the chip 10 to the chip 10, and a pair of transmission (TX) vias 52 coupled to the TX pads 22 to transfer signals from the chip 10 to the outside of the chip 10.
However, as packages become smaller and smaller, the distance between the RX pads 21 and the TX pads 22 become smaller. The distance between the RX vias 51 and the TX vias 52 also become smaller. The signals traveling along the RX vias 51, which have been attenuated by the transmitting media, will be interfered with by the signals carried by the TX vias 52. This is because, the TX vias 52 usually carry stronger signal pulses than the RX vias 51. The cross-talk occurs when the stronger transmitter signal is coupled capacitively and inductively to the weaker receiving signal between the RX pads 21 and TX pads 22, the corresponding C4 balls 30, and the corresponding vias 51 and 52. This cross-talk problem is particularly acute for the vias 51 and 52 near the interface between the chip 10 and the carrier 40.
FIGS. 2A and 2B illustrate two example configurations for RX and TX pads in a conventional thin-film chip package. In FIG. 2A, the carrier 40 near the interface with the chip 10 comprises pairs of TX conductors 201 and 203 adjacent to pairs of RX conductors 202 and 204. Evenly spaced among the conductors is a plurality of power or ground conductors 205 and 210. These power conductors 205 shield TX and RX conductors adjacent to it from the cross-talk effect. For example, RX conductor R5 and TX conductor T4 are shielded by the power conductor 210. However, RX conductor R5 is adjacent to TX conductor T3, but without a power conductor 205 between them. The transmitter signal carried by the TX conductor T3 will couple with the receiver signal carried by RX conductor R5 much more than with the receiver signal carried by RX conductor R7. With this uneven coupling of the signals, the receiver signal pair carried by the RX conductor R5 or R7 will experience cross-talk from the transmitter signal carried by TX conductor T3. Each signal pair is located orthogonally to its adjacent pairs.
The same is true for RX and TX conductors stacked vertically, as illustrated in FIG. 2B. Two pairs of RX conductors 206 and 208 are each located adjacent to two pairs of TX conductors 207 and 209. Power conductors 205 and 210 are evenly distributed among them. In this case, TX conductors T2 and T4 evenly affects RX conductors R1 and R3. Thus, the net cross-talk effect is substantially reduced. Similarly, TX conductors T6 and T8 evenly affects RX conductors R5 and R7. However, RX conductors R5 and R3 still experience cross-talk from each other, as do TX conductors T6 and T4. The conductor arrangement in FIG. 2B experiences less cross-talk than the conductor arrangement in FIG. 2A, but the cross-talk problem still exists.
Such cross-talk compromises the quality of the signals traversing the package, adversely affecting performance. One conventional approach to this problem is to increase the distance between the conductors. However, this approach reduces the interconnect density of the package, or, if the density is maintained, results in a significantly larger package.
Accordingly, there exists a need for an improved apparatus and method for reducing cross-talk between adjacent signals in a layer of a semiconductor chip package. The improved apparatus and method should reduce the cross-talk without compromising the density of the interconnections or resulting in an increase in the size of the package. The present invention addresses such a need.